Recently, semiconductor products using a metal oxide semiconductor (MOS) transistor and the like are required to achieve a high speed operation and low power consumption at the same time. To achieve a high speed operation, it is preferable to increase a driving current of a transistor. However, when a power source voltage is increased to increase the driving current, the power consumption also increases, and this is against achieving low power consumption. Further, when a space taken by a transistor is enlarged to increase the driving current, the entire area of a circuit increases, and this makes it difficult to achieve downsizing of a semiconductor product.
On the other hand, to increase a driving current of a MOS transistor, it is effective to reduce a threshold voltage between a gate terminal and a source terminal. For this purpose, it is effective to adjust a back gate voltage as a voltage of a substrate of the MOS transistor, and reduce the threshold voltage by a substrate bias effect. For example, Japanese Patent No. 3039336 describes a technique of applying a voltage shifted from a power source as a back gate voltage of a MOS transistor, and reducing a threshold voltage when the MOS transistor is in an operating state.
In a circuit described in Japanese Patent No. 3039336, as depicted in FIG. 21, diodes 30 and 40 are provided between a power source potential and back gate terminals of transistors 10 and 20, respectively. With this arrangement, in an operating state of the MOS transistor 10, a forward current flows to the diode 30, and a back gate voltage of the MOS transistor 10 is shifted from a power source voltage (a positive power source Vdd). Consequently, a threshold voltage of the MOS transistor 10 is reduced and a driving current increases. In an operating state of the MOS transistor 20, a forward current flows to the diode 40, and a back gate voltage of the MOS transistor 20 is shifted from a power source voltage (a negative power source Vss). Consequently, a threshold voltage of the MOS transistor 20 is reduced and a driving current increases.
However, to increase the driving current as described above, a leak current also increases along with the increase of the driving current. That is, when a space taken by a transistor is increased, an element size increases, and this can be a cause of the increase of the leak current.
The leak current also increases when a threshold voltage is reduced by shifting a back gate voltage. Specifically, when a relationship between a gate voltage VG and a current IDS between a drain terminal and a source terminal depicted in FIG. 22 is referred to, for example, it is clear that when a back gate voltage indicated by a solid line in FIG. 22 is low, a driving current is small and a leak current is also small. When a back gate voltage indicated by a broken line in FIG. 22 is at a medium level, a driving current and a leak current are also at medium levels. When a back gate voltage indicated by a dashed line in FIG. 22 is high, a driving current becomes large, but a leak current also becomes large. Particularly, in FIG. 22, because the current IDS is expressed in a logarithmic scale, it is clear that the increase of the leak current along with the increase of the back gate voltage is very large.
As described above, when the back gate voltage is fixedly shifted, a leak current increases as well as a driving current. Therefore, there is a certain limit to improve the driving capacity by reducing the threshold voltage. To dynamically control the back gate voltage, there can be considered a circuit configuration that applies a voltage equal to a gate input voltage of a MOS transistor to a back gate terminal. In this case, however, a forward voltage is generated between the source terminal and the back gate terminal and a current is also generated, and thus it is not realistic to apply the gate input voltage to the back gate terminal.